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ADS-B Aircraft Decoder

Complete 1090 MHz receiver with real-time PPM demodulation and message parsing.

Status
Not Started
Phase
Phase 3: Advanced (Months 15-18)
Platform
RealDigital Blackboard (Zynq-7000) + RTL-SDR
Language
VHDL

Overview

Build a complete ADS-B receiver that decodes aircraft position and identification from 1090 MHz signals. ADS-B (Automatic Dependent Surveillance - Broadcast) uses Pulse Position Modulation (PPM) to transmit 112-bit messages containing aircraft identification, position, altitude, and velocity.

The relatively simple modulation scheme makes this an excellent stepping stone toward the more complex QPSK demodulation in the Meteor M2 capstone project. This project directly demonstrates avionics domain knowledge relevant to NZ employers like Rocket Lab, Kea Aerospace, and Dawn Aerospace.

ADS-B Protocol Overview

Frequency1090 MHz
ModulationPulse Position Modulation (PPM)
Message Length112 bits (extended squitter)
Preamble8 μs pattern
Data Rate1 Mbit/s
CRC24-bit

System Architecture

1090MHz Antenna → RTL-SDR → USB → Zynq ARM → Sample Buffer → FPGA
                                                                            ↓
                                                          Preamble Detection
                                                                            ↓
                                                          PPM Demodulation
                                                                            ↓
                                                          Bit Extraction
                                                                            ↓
                                                          CRC-24 Validation
                                                                            ↓
                                                          Message FIFO → ARM
                                                                            ↓
                                                          Display/Network Output

Specifications

InputRTL-SDR 2.4 MSPS I/Q samples
Detection Range100+ nm with good antenna
Message TypesDF17 (Extended Squitter) minimum
Output FormatRaw hex + decoded fields
Compatibilitydump1090 network protocol

FPGA (PL) Requirements

  • Preamble detection (8 μs pattern matcher)
  • PPM demodulation and bit extraction
  • CRC-24 validation
  • Message type classification
  • Decoded message FIFO

ARM (PS) Requirements

  • RTL-SDR USB interface via librtlsdr
  • Sample streaming to FPGA via DMA
  • Message parsing (DF17 position, identification, velocity)
  • Position calculation (CPR decoding)
  • Output: UART, network (dump1090 compatible)

Skills Demonstrated

  • Real-time Demodulation: PPM signal processing in hardware
  • Protocol Implementation: Working from ICAO specifications
  • CRC Algorithms: Hardware CRC-24 computation
  • Complete System Integration: RF-to-display pipeline
  • Zynq PS-PL Data Streaming: DMA and interrupts
  • Avionics Domain Knowledge: Mode S and ADS-B

Hardware

ItemEst. CostSource
RTL-SDR V3 or V4$35-50RTL-SDR.com/Amazon
1090 MHz antenna (or DIY)$0-30Amazon or build from coax
SMA cables/adapters$10Amazon
Total~$45-90

Resources

  • The 1090 Megahertz Riddle by Junzi Sun — essential reading
  • dump1090 — Reference decoder
  • ADSB-Out — Protocol reference
  • ICAO Doc 9871 — Official Mode S specification
  • Virtual Radar Server — For visualization

Deliverables

  • GitHub repo with VHDL source
  • Testbench with captured ADS-B samples
  • Block diagram of demodulation chain
  • Screenshot of decoded aircraft on map
  • Performance analysis (detection rate, range)
  • Video demo showing live aircraft tracking

Prerequisites

This project requires understanding of:

  • I/Q sampling and complex baseband representation
  • Digital downconversion (DDC)
  • Modulation schemes (ASK, FSK, PSK)
  • RTL-SDR architecture and data interface

Implementation Notes

Implementation notes will be added during development.

Resource Utilization

To be measured after implementation.

Progress Log

Not yet started

This project begins Phase 3 after SDR fundamentals study (Months 13-14).