GPS Disciplined Oscillator

Overview

Build a precision timing reference that disciplines a local oscillator to GPS time, demonstrating timing measurement and control loop design. This project is directly relevant to precision timing companies like Rakon and demonstrates domain expertise in frequency control systems.

The GPSDO uses a Time-to-Digital Converter (TDC) implemented in the FPGA to measure the phase difference between the GPS 1PPS signal and the local oscillator. A digital PI loop filter controls a DAC to tune the oscillator, achieving sub-ppb stability when locked.

Specifications

GPS Input	Modular: NEO-M8N or F9P 1PPS
TDC Resolution	< 1 ns
Output Frequency	10 MHz
Stability (locked)	< 1 ppb
Lock Time	< 5 minutes
Holdover	Basic (future enhancement)

Requirements

• Time-to-Digital Converter (TDC) using FPGA techniques
• Digital PI/PID loop filter in VHDL
• DAC interface for oscillator tuning
• Modular GPS input (header for F9P or standalone module)
• UART telemetry output (frequency error, phase error, lock status)
• Status display on 7-segment or via terminal
• ARM processor for high-level monitoring (Zynq PS)

Skills Demonstrated

• Precision Timing: Sub-nanosecond phase measurement
• Control Loop Design: PLL concepts and loop filter tuning
• DAC Interfacing: Analog output control
• VHDL Proficiency: Complete system in VHDL
• Zynq PS-PL: Mixed hardware/software design
• Domain Knowledge: Directly relevant to Rakon

Architecture

System block diagram:

GPS Module (1PPS) ——┌
        or             └——→ FPGA TDC ——→ Phase Comparator ——→ Loop Filter
F9P (1PPS) —————└                      ↑                        ↓
                                          ├                       DAC
                                    10MHz ÷ N                       ↓
                                          ↑                   TCXO/OCXO
                                          └—————————————— 10MHz out

Implementation Phases

Phase A: TCXO Version

• Implement TDC in FPGA
• Basic PI loop filter
• TCXO with voltage control
• Serial interface for monitoring

Phase B: OCXO Upgrade

• Replace TCXO with OCXO
• Tune loop filter for OCXO dynamics
• Add temperature compensation
• Improve holdover capability

Hardware Build

Bill of Materials

Item	Est. Cost	Source
TCXO module (initial)	$10-15	DigiKey/AliExpress
OCXO module (surplus)	$30-50	eBay
u-blox NEO-M8N GPS module	$15-25	Amazon/AliExpress
DAC module (MCP4725 or similar)	$5-10	Amazon
GPS antenna	$10-15	Amazon
Breadboard/protoboard	$5	Amazon
Misc connectors, headers	$10	DigiKey
Total	~$85-130

Note: Existing F9P can be used as GPS source ($0 additional).

Resources

• GPSDO Theory - Excellent complete reference
• Lars DIY GPSDO - Algorithm reference
• Analog Devices AN-1002 (GPSDO application note)
• Rakon oscillator datasheets (understand the industry)
• The Zynq Book for PS-PL integration

Deliverables

• GitHub repo with VHDL source
• Schematic (KiCad) for external components
• Block diagram of complete system
• Allan deviation plot showing stability
• Comparison data: F9P reference vs NEO-M8N
• Video demo showing lock acquisition
• Technical writeup explaining control loop design

Implementation Notes

Implementation notes will be added during development.

Resource Utilization

To be measured after implementation.

Progress Log